1. Field of the Invention
The present invention relates to a semiconductor integrated circuit having a power supply circuit that generates an internal supply voltage using an external power supply voltage, and a method for generating the internal supply voltage in the semiconductor integrated circuit.
2. Description of the Related Art
Recently, portable equipment driven by batteries has come into wide use. It is requested that a semiconductor integrated circuit mounted in the portable equipment is of a low power consumption specification in order to ensure a long life of the batteries. In many cases, this type of a semiconductor integrated circuit has a voltage generator that generates an internal supply voltage whose voltage is lower than an external supply voltage by using the external supply voltage supplied from the outside thereof, and low power consumption has been achieved by supplying the internal supply voltage into predetermined circuits. Recently, a semiconductor integrated circuit is internally provided with a plurality of voltage generators, wherein a plurality of kinds of internal supply voltage is respectively supplied into the major circuit blocks.
FIG. 1 shows an example of the major circuits to generate an internal supply circuit in a semiconductor integrated circuit.
A reference voltage generator 1 has a current-mirror circuit 1a, and generates reference voltage VREF by using an external supply voltage VEXT. A power-on reset circuit 2 inactivates a power-on reset signal POR (that is, to make the power-on reset signal enter a lower level) when the external supply power VEXT exceeds a predetermined value. The current-mirror circuit 1a has a function by which the reference voltage VREF is forcibly made into the external supply voltage VEXT upon receiving a high-leveled power-on reset signal POR. The reference generator 1 generates the reference voltage VREF, following the external supply voltage VEXT, by the power-on reset signal POR when the external supply voltage VEXT is low and the reference voltage VREF cannot be generated by the current-mirror circuit la. That is, the reference voltage VREF can be steadily generated where the external supply voltage VEXT is low.
A voltage generator 3 has a differential amplifier 3a composed of a current-mirror circuit, and a regulator 3b composed of a pMOS transistor. The differential amplifier 3a controls the regulator 3b upon receiving the reference voltage VREF and the fed-back internal supply voltage VINT. The regulator 3b generates an internal supply voltage having predetermined drive capacity.
An example in which the reference generator is controlled by the power-on reset signal POR is disclosed in Japanese Unexamined Patent Application Publication No. Hei-130170.
However, the current supply capacity of supply voltage VEXT generated by batteries is lower in comparison with the current supply capacity of general power supplies. Therefore, for example, when the respective circuits of semiconductor integrated circuits mounted in portable equipment operates as a whole when the power is turned on, there are cases where the supply voltage VEXT is temporarily lowered.
FIG. 2 shows the voltage waveform when the supply voltage VEXT is lowered.
As the external supply voltage VEXT is temporarily lowered when the power is turned on, the differential amplifier 3a of the voltage generator 3 shown in FIG. 1 does not operate normally, and a feedthrough current occurs. Resultantly, such a problem occurs, by which the internal supply voltage VINT does not rise to a normal level. In particular, the above-described problem is likely to occur where the differential amplifier 3a is composed of a CMOS circuit. The reason resides in that the external supply voltage VEXT supplied is required to be greater by two or more times than the threshold voltage of a transistor in order to steadily actuate the differential amplifier 3a (current-mirror circuit). That is, the CMOS differential amplifier has a smaller operating margin at its low voltage side.
Further, generally, in a semiconductor integrated circuit mounted in portable equipment, the operational voltage is reduced in order to lower the power consumption (For example, the external supply voltage is 2.5V). Since the threshold voltage of the transistor scarcely depends on the external supply voltage, the ratio of the threshold voltage of the transistor to the external supply voltage VEXT is increased, wherein the above-described problem is still likely to occur.
In addition, as shown in FIG. 2, the timing of generation of the internal supply voltage VINT shifts, wherein as the power-on reset signal POR is inactivated (going to a low level) before the internal supply voltage VINT is raised to a normal voltage, circuits that are required to be reset in the semiconductor integrated circuit will be activated before a normal internal supply voltage VINT is supplied. As a result, these circuits are not correctly reset, there is a possibility of the portable equipment being hung up.
On the other hand, as described above, the reference voltage generator 1 generates the reference voltage VREF, following the external supply voltage VEXT, by a power-on reset signal POR when the power is turned on. However, when the voltage generator 3 for receiving the reference voltage VREF has a CMOS differential amplifier 3a, the voltage generator does not operate normally in a region where the external supply voltage VEXT is low even if the voltage generator 3 receives the reference voltage VREF following the external supply voltage VEXT. Therefore, the voltage generator 3 cannot generate a normal internal supply voltage VINT.
An object of the present invention is to reliably generate an internal supply voltage when an external supply voltage supplied to a semiconductor integrated circuit is low and, in particular, to quickly raise the internal supply voltage following the external supply voltage when the power is turned on.
Another object of the present invention is to securely generate an internal supply voltage in a voltage generator having a CMOS current-mirror circuit even when the supply voltage supplied to the CMOS current-mirror circuit is low.
Still another object of the present invention is to reliably reset an internal circuit supplied with the internal supply voltage.
According to one of the aspects of the semiconductor integrated circuit in the present invention, the semiconductor integrated circuit has a voltage generator and a power-on circuit. The voltage generator generates an internal supply voltage supplied to internal circuits under control of the reference voltage by using an external supply voltage supplied from the exterior. The power-on circuit inactivates a power-on reset signal which resets at least one of the internal circuits (predetermined internal circuit(s)) when both the external supply voltage and the internal supply voltage exceed a predetermined value. The voltage generator forcibly supplies the external supply voltage as the internal supply voltage when the power-on reset signal is activated. Therefore, the internal supply voltage is generated following the external supply voltage when the external supply voltage is low and the voltage generator does not normally operate as in the case where the power is turned on.
According to another aspect of the semiconductor integrated circuit in the present invention, the voltage generator has a differential amplifier and a regulator. The differential amplifier outputs a differentially amplified signal upon receiving the reference voltage and a voltage that fluctuates depending on the internal supply voltage. Under control of the output of the differential amplifier, the regulator generates an internal supply voltage by using the external supply voltage. Since the power-on reset signal controls the differential amplifier or the regulator, the regulator is forcibly turned on when the power-on reset signal is activated. As a result, when the differential amplifier does not normally operate or the reference voltage is not normally generated because the external power voltage is low, the internal supply voltage is generated following the external supply voltage.
According to another aspect of the semiconductor integrated circuit in the present invention, the differential amplifier has a CMOS current-mirror circuit. The CMOS current-mirror circuit, in general, requires for its operation an external supply voltage twice or more greater than the threshold voltage of a transistor. That is, the differential amplifier composed of a CMOS current-mirror circuit has a small operation margin at the low supply voltage side. The internal supply voltage can be reliably generated even where such CMOS current-mirror circuit is used in the voltage generator.
According to another aspect of the semiconductor integrated circuit in the present invention, the voltage generator has a transistor for connecting an external supply line supplied with an external supply voltage, to an internal supply line supplied with an internal supply voltage. The transistor is forcibly turned on to connect the external supply line and the internal supply line when the power-on reset signal is activated. Therefore, when a circuit for generating the internal supply voltage in the voltage generator does not operate normally due to a low external supply voltage(when the power-on reset signal is activated), the internal supply voltage is generated following the external supply voltage.
According to another aspect of the semiconductor integrated circuit in the present invention, the semiconductor integrated circuit has a plurality of voltage generators. The power-on circuit has a plurality of reset signal generators corresponding to the internal supply voltages generated by the voltage generator and the external supply voltage, respectively. Each reset signal generator inactivates a reset signal when the external supply voltage or the internal supply voltage exceeds a predetermined value. The power-on reset signal is inactivated in response to a reset signal which has been activated latest while activated in response to a reset signal which has been activated earliest. Consequently, the internal circuit for receiving a power-on reset signal can be reliably supplied with a supply voltage at a predetermined value required for its operation and can be reset to a predetermined state when the power-on reset signal is inactivated. Furthermore, the internal circuit immediately terminates its operation at the time of activation of the power-on reset signal.
According to another aspect of the semiconductor integrated circuit in the present invention, the semiconductor integrated circuit has a voltage generator for generating an internal supply voltage lower than the external supply voltage. The power-on circuit has a logical operation circuit and a level shifter. The logical operation circuit logically operates the reset signals and outputs the operation result as a power-on reset signal. The level shifter receives the reset signal corresponding to the internal supply voltage lower than the external supply voltage to raise a logic level of the reset signal on the high voltage side and supplies the raised reset signal to the logical operation circuit. Therefore, it is possible to simply generate the power-on reset signals by using the logical operation circuit. The high level of the reset signal is raised to a predetermined value by the level shifter, which enables transmission of the high level to the logical operation circuit with reliability and secure operation of the logical operation circuit. In particular, in the case where the operation circuit is composed of CMOS, the flow of feedthrough current can be prevented.
According to one of the aspects of a method for generating internal supply voltages in a semiconductor integrated circuit in the present invention, under control of a reference voltage, an internal supply voltage to be supplied to an internal circuit is generated by using an external supply voltage supplied from the exterior. The power-on reset signal for resetting at least one of the internal circuits (predetermined internal circuit(s)) is inactivated when the external supply voltage and the internal supply voltage both exceed a predetermined value. Further, the external supply voltage is forcibly supplied as an internal supply voltage when the power-on reset signal is activated. Therefore, the internal supply voltage is generated following the external supply voltage even when the voltage generator for generating an internal supply voltage does not normally operate due to a low external supply voltage such as in a case where the power is turned on.
According to another aspect of the method for generating internal supply voltages in a semiconductor integrated circuit in the present invention, a plurality of kinds of internal supply voltage is generated to be supplied into the internal circuits. Reset signals respectively corresponding to supply voltages are inactivated when the external supply voltage and each internal supply voltage exceed a predetermined value. The power-on reset signal is inactivated in response to the reset signal which has been inactivated latest while activated in response to the reset signal which has been activated earliest. Consequently, the internal circuit for receiving a power-on reset signal can be reliably supplied with supply voltage at a predetermined value required for its operation and can be reset to a predetermined state when the power-on reset signal is inactivated. Furthermore, the internal circuit immediately terminates its operation at the time of activation of the power-on reset signals.